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Resource Sheet
TRNG
True Random Number Generator IP Core
Product code: XIP8001B
The True Random Number Generator (TRNG) Intellectual Property (IP) core designed in generic and portable SystemVerilog. It has been designed for easy integration with FPGA- and ASIC-based designs, and includes the NIST SP 800-90B specified startup tests and online health tests.
This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.
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Xiphera protects your critical systems by designing security directly into hardware.
News
- Company news & updates
2025 was a year that strengthened Xiphera’s position in hardware-based cryptography and delivered clear, steady progress. Our direction remained clear: to build a scalable and internationally focused business around hardware cryptography, delivered as Intellectual Property (IP) cores and security protocol engines for ASICs and FPGAs, and designed without hidden software elements.
- Product news & updates
Quantum computers will eventually break today’s public key encryption, and attackers may already capture and store sensitive data to decrypt in the future. Critical information must be protected in advance, before quantum technology becomes widely available.
- Company news & updates
Xiphera Ltd and iWave Global have entered into a collaboration to combine Xiphera’s advanced cryptographic solutions with iWave’s extensive portfolio of Altera FPGA-based boards and solutions.