Xiphera’s portfolio of symmetric encryption algorithms provides uncompromised data encryption.

About the product

Advanced Encryption Standard, AES, is the most widely used block cipher (symmetric encryption) and functions by encrypting a 128-bit block of data using an either 128, 192, or 256-bit key. AES is a symmetric encryption algorithm, where the same key is used for both encrypting and decrypting a message. Xiphera provides AES block cipher IP cores that support a range of operation modes, including CTR, GCM, CBC, OFB, CFB, and XTS. For versatility with dynamically selectable modes, we offer Versatile AES-256 IP core.

AES-GCM is a widely used cryptographic algorithm for Authenticated Encryption with Associated Data (AEAD) purposes, as it provides both data confidentiality and authenticity. For the extremely high-performance demands, we offer our extreme-speed AES-GCM IP core which achieves several hundreds of Gbps of throughput on modern architectures. The extreme-speed AES-GCM IP core is able to handle messages without additional message-specific delay ensuring a continuous processing flow. All our IP cores are engineered for seamless integration into FPGA and ASIC designs using a vendor-neutral design approach, and their functionality is independent of any manufacturer-specific FPGA features. It’s important to highlight our AES-GCM IP cores are validated under the NIST CAVP program.

Xiphera offers the following IP cores implementing AES in GCM mode of operation:

  • AES256-GCM IP core, balanced variant (XIP1113B)
  • AES256-GCM IP core, high-speed variant (XIP1113H)
  • AES256-GCM Authenticated Encryption IP core, extreme-speed variant (XIP1113E)

Key features

  1. Optimised Implementation utilizing unrolling, pipelining, optimized AES S-box design, and GMAC calculation based on pipelined Karatsuba multipliers enable extremely high performance.
  2. Moderate/Compact Resource Requirements: Xiphera’s AES-GCM products do not require any multipliers, DSPBlocks or internal memory1 in a typical FPGA implementation.
  3. Standard Compliance: The AES-GCM solution is compliant with both the Advanced Encryption Algorithm (AES) standard, as well as with the Galois Counter Mode (GCM) standard.
Internal high-level block diagram of the extreme-speed AES256-GCM Authenticated Encryption IP core (XIP1113E).
Internal high-level block diagram of the extreme-speed AES256-GCM Authenticated Encryption IP core.

For more details, including FPGA resources & peak performance as well as ordering instructions, open the full product briefs in PDF. Contact us here, and we’ll get back to you as soon as possible.

Partner collaborations

We are proud partners with leading global as well as innovative growing FPGA companies. We offer a selection of our cryptographic IP cores for our technology partners. Visit our partner pages to learn more about our AES-GCM offering for our partners.