Xiphera’s portfolio of symmetric encryption algorithms provides uncompromised data encryption.
About the product
ChaCha20-Poly1305 is a combination of the ChaCha20 stream cipher and Poly1305 message authentication code and it is used in an AEAD scheme in multiple protocols, including TLS 1.3.
Xiphera offers an IP core designed for ChaCha20-Poly1305 Authenticated Encryption with Associated Data (AEAD) scheme protecting both confidentiality and authenticity at the same time. The current definitive standard for ChaCha20-Poly1305 is RFC 8439, “ChaCha20 and Poly1305 for IETF Protocols”.
Xiphera offers both a balanced and a high-speed IP core for ChaCha20-Poly1305 Authenticated Encryption. Both the IP cores are designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, and the functionality does not rely on any FPGA manufacturer-specific features.
- Balanced IP Core for ChaCha20-Poly1305 Authenticated Encryption (XIP2113B)
- High-speed IP Core for ChaCha20-Poly1305 Authenticated Encryption (XIP2113H)
- High Throughput with Short Latency: Both ChaCha20-Polu1305 IP cores offers very high throughput for a single stream of data as it is capable to process one 16-byte block per clock cycle after certain initial latency. The length of the initial latency depends on the length of the message and IP core has been carefully optimized to minimize this initial latency.
- Constant Latency: The execution time of both ChaCha20-Polu1305 IP cores is independent of the key values and message contents (apart from the message length), and consequently provides full protection against timing-based side-channel attacks.
- Standard Compliance: Both of the ChaCha20-Polu1305 IP cores are fully compliant with RFC 8439 “ChaCha20 and Poly1305 for IETF Protocols”