Xiphera’s portfolio of symmetric encryption algorithms provides uncompromised data encryption.

About the product

ChaCha20-Poly1305 is a combination of the ChaCha20 stream cipher and Poly1305 message authentication code and it is used in an AEAD scheme in multiple protocols, including TLS 1.3.

Xiphera offers an IP core designed for ChaCha20-Poly1305 Authenticated Encryption with Associated Data (AEAD) scheme protecting both confidentiality and authenticity at the same time. The current definitive standard for ChaCha20-Poly1305 is RFC 8439, “ChaCha20 and Poly1305 for IETF Protocols”.

Xiphera offers both a balanced and a high-speed IP core for ChaCha20-Poly1305 Authenticated Encryption. Both the IP cores are designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, and the functionality does not rely on any FPGA manufacturer-specific features.

  1. ChaCha20-Poly1305 Authenticated Encryption IP core, balanced variant (XIP2113B)
  2. ChaCha20-Poly1305 Authenticated Encryption IP core, high-speed variant (XIP2113H)

Key features

  1. High Throughput with Short Latency: Both ChaCha20-Polu1305 IP cores offers very high throughput for a single stream of data as it is capable to process one 16-byte block per clock cycle after certain initial latency. The length of the initial latency depends on the length of the message and IP core has been carefully optimized to minimize this initial latency.
  2. Constant Latency: The execution time of both ChaCha20-Polu1305 IP cores is independent of the key values and message contents (apart from the message length), and consequently provides full protection against timing-based side-channel attacks.
  3. Standard Compliance: Both of the ChaCha20-Polu1305 IP cores are fully compliant with RFC 8439 “ChaCha20 and Poly1305 for IETF Protocols”
Internal high-level block diagram of the high-speed ChaCha20-Poly1305 IP core (XIP2113H).
Internal high-level block diagram of the high-speed ChaCha20-Poly1305 IP core.

For more details, including FPGA resources & peak performance as well as ordering instructions, open the full product briefs in PDF. Contact us here, and we’ll get back to you as soon as possible.

Interested to learn more about the technical details and performance numbers for ASIC application? Register for the ASIC-specific product brief of the high-speed ChaCha20-Poly1305 core here.

Partner collaborations

We are proud partners with leading global as well as innovative growing FPGA companies. We offer a selection of our cryptographic IP cores for our technology partners. Visit our partner pages to learn more about our MACsec offering on our partner portfolios.