Hardware-based security for high-level protection.

Xiphera's product offering

Xiphera protects critical systems by designing security directly into hardware. We specialise in designing and implementing proven cryptographic security for embedded systems using our cryptographic IP cores (Intellectual Property cores). Our primary aim is to directly embed our fully in-house developed security solutions into hardware, with all our cryptographic IP cores and solutions targeted for Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). Our portfolio of secure and efficient IP cores covers various industry-approved and standardised cryptographic algorithms.

Our approach to exclusively employing logic-only implementations for cryptographic IP cores offers multiple advantages, including enhanced performance, cost-effective project development, and swift time-to-market, all while maintaining top-tier security level. Our strong cryptographic expertise and extensive experience in digital system design enable us to help our customers fully focus on their core operations while protecting their most valuable assets with Xiphera’s proven cryptographic security.

Quantum attack protection with post-quantum cryptography.

Securing point-to-point communication links and server-client connection over the Internet with security protocols.

Extensive portfolio of cryptographic hash functions complying with industry-wide standards.

Uncompromised data encryption provided by the comprehensive symmetric encryption portfolio.

Solutions for key exchange, digital signatures, and public-key encryption.

Standard-compliant True and Pseudo randomness with random number generation.

Explaining our IP core variants

Xiphera’s product families consist of secure and efficient cryptographic IP cores. The IP cores have different requirements based on the application specific needs and use case prerequisites. We offer four types of variants for our cryptographic IP cores, which can be selected based on your company’s individual and tailored needs.

C, Compact

Optimised for low digital logic usage, requiring a minimum amount of FPGA resources (LUTs, DSPs, memories) or viable physical area of ASICs.

B, Balanced

Optimal balance between the logic usage area and performance. Optimised for the minimum resource area for achieving a given throughput requirement.

H, High-speed

Designed for high-performance solutions, where the end application can achieve its required high throughput with maximal security.

E, Extreme-speed

Protecting user data while upholding extreme-speed performance with performance levels exceeding hundreds of Gbps. 

Xiphera’s whole product offering can be reviewed on our Product Catalogue page. The page will present all product families and their IP cores, with an extensive view on each IP core’s FPGA resrouces and performance numbers. You can also access all our FPGA-specific as well as ASIC-specific product briefs from this page.