Pseudorandom Number Generation (PRNG)

Xiphera offers randomness with industry standard-compliant True Random Number Generators (TRNG) and Pseudorandom Number Generators (PRNG).

About the product

A Pseudorandom Number Generation (PRNG) is often used in applications, where lots of random data is needed, for example in the generation of session-specific secret key material in core network routers.

Xiphera offers a balanced and high-speed versions of a PRNG IP core, providing the user with random data at the speed of gigabits or even tens of gigabits per second. Both of Xiphera’s PRNG IP cores are based on the standardised use of CTR_DRBG defined in SP800-90A with 256-bit AES.

Xiphera’s PRNG IP cores have received the CAVP validation batches from the American NIST (National Institute of Standards and Technology).

  1. AES based Pseudorandom Number Generator, balanced variant (XIP8103B)
  2. AES based Pseudorandom Number Generator, high-speed variant (XIP8103H)

The balanced variant achieves a throughput in the gigabits per second (Gbps) range, and the high-speed version outputs random data at the rate of tens of gigabits per second speed. Importantly – and as required by the standards – both of the newly launched PRNG IP cores need to be periodically re-seeded with fresh randomnes from a full entropy source, such as Xiphera’s TRNG IP core.

Key features

  1. Versatility: Both of our PRNG IP cores support forward prediction resistance mode, which can be set on and off between output generation, as well as the use of personalization strings and additional inputs for instantiation and reseeding.
  2. Standard Compliance: Both of our PRNG IP cores are compliant with the NIST SP800-90A specification. The balanced PRNG can be combined with Xiphera’s NIST SP800-90B compliant TRNG IP core to form a NIST SP800-90C compliant Random Bit Generator (RBG).
  3. Easy integration with AXI4-interface
  4. High Performance: Our high-speed PRNG IP core  provides a maximum throughput of 30Gbps.
  5. Balanced Between Speed and Resource Requirements: Our balanced PRNG IP core requires ”resource numbers here” while providing a maximum throughput of ”resource numbers here”.
Internal high-level block diagram for the high-speed PRNG IP core (XIP8103H).
Internal high-level block diagram for the high-speed PRNG IP core.

For more details, including FPGA resources & peak performance as well as ordering instructions, open the full product briefs in PDF. Contact us here, and we’ll get back to you as soon as possible.

Partner collaborations

We are proud partners with leading global as well as innovative growing FPGA companies. We offer a selection of our cryptographic IP cores for our technology partners. Visit our partner pages to learn more about our MACsec offering on our partner portfolios.