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Resource Sheet

IPsec IP Core

Product code: XIP7213E

IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec core enhances secure communication at layer three (Network) of the OSI model, ensuring the authenticity and confidentiality of data traffic. It leverages the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with a 256-bit key length, for Encapsulating Security Payload (ESP) frame processing within the IPsec protocol.

This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.

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