MACsec provides data confidentiality and integrity protection for the data link layer and uses AES-GCM with either 128-bit or 256-bit keys as the cryptographic algorithm.
Typical MACsec applications require high data bandwidths such as 1G, 10G, 25G or 40G and often benefit greatly from FPGA-based acceleration.
Four different solution variants allow resource efficient implementation for designs with low or high-speed interfaces. Implementation is technology independent and can be
integrated into FPGA and ASIC designs. Parameters allows to define number of RX and TX keys and options for streaming interfaces. VHDL testbench for MACSEC is included into deliverables.
The following IP cores implement MACSEC, please click to open the Product Brief of the IP core.
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