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Resource Sheet
TRNG
True Random Number Generator IP Core
Product code: XIP8001B
The True Random Number Generator (TRNG) Intellectual Property (IP) core designed in generic and portable SystemVerilog. It has been designed for easy integration with FPGA- and ASIC-based designs, and includes the NIST SP 800-90B specified startup tests and online health tests.
This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.
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Xiphera protects your critical systems by designing security directly into hardware.
News
- Company news & updates
17 June 2026. Espoo, Finland. Xiphera, the hardware-based cryptographic solutions expert, has announced a collaboration with Agile Analog, the analog security IP specialist. The integration of Xiphera’s digital cryptographic cores and Agile Analog’s agileSecure anti-tamper sensor IP creates a unified defense solution for the next generation of semiconductor security. This is particularly important as the industry transitions to Post-Quantum Cryptography (PQC).
- Cryptography news & updates
Tampere University has launched the SecureSoC project that aims to develop secure system-on-chip (SoC) technologies for future critical systems in Finland. This collaborative development initiative is funded by Business Finland and involves Insta, Nokia, VLSI Solution Oy, Wapice, Xiphera and TTTech Flexibilis Oy as industry partners
- Cryptography news & updates
Whether you’re a technologist, business leader, or simply curious, physical AI is reshaping how we live, work, and interact with the world. Its potential to augment human capabilities, solve global challenges, and create new industries is why physical AI is dominating conversations today. But how do we secure these systems against cyber threats that could have real-world consequences?