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Resource Sheet
TRNG
True Random Number Generator IP Core
Product code: XIP8001B
The True Random Number Generator (TRNG) Intellectual Property (IP) core designed in generic and portable SystemVerilog. It has been designed for easy integration with FPGA- and ASIC-based designs, and includes the NIST SP 800-90B specified startup tests and online health tests.
This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.
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News
- Company news & updates
Japan is a focus market for Xiphera’s cryptographic hardware security solutions, and we are pleased to welcome Yasuhiro Okumura as our new Country Manager for Japan. His appointment strengthens our local presence and supports our continued growth in the region.
- Company news & updates, Cryptography news & updates
Xiphera has been selected for a new project under the European Space Agency’s (ESA) ARTES programme. The project will focus on developing a high-speed security IP core for optical satellite communications, further strengthening Xiphera’s position as a provider of advanced hardware-based cybersecurity solutions for the space sector.
- Company news & updates
17 June 2026. Espoo, Finland. Xiphera, the hardware-based cryptographic solutions expert, has announced a collaboration with Agile Analog, the analog security IP specialist. The integration of Xiphera’s digital cryptographic cores and Agile Analog’s agileSecure anti-tamper sensor IP creates a unified defense solution for the next generation of semiconductor security. This is particularly important as the industry transitions to Post-Quantum Cryptography (PQC).