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Resource Sheet
Rivest–Shamir–Adleman Signature Verification IP Core
Product code: XIP5012C
This IP Core from Xiphera is a compact Intellectual Property (IP) core implementing the Rivest-Shamir-Adleman Signature Verification algorithm. RSA signature verification is a cryptographic process used to prove that a digital message or file genuinely came from a specific sender and hasn’t been tampered with. Xiphera offers a compact variant of RSA signature verification.
This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.
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News
- Cryptography news & updates
Tampere University has launched the SecureSoC project that aims to develop secure system-on-chip (SoC) technologies for future critical systems in Finland. This collaborative development initiative is funded by Business Finland and involves Insta, Nokia, VLSI Solution Oy, Wapice, Xiphera and TTTech Flexibilis Oy as industry partners
- Cryptography news & updates
Whether you’re a technologist, business leader, or simply curious, physical AI is reshaping how we live, work, and interact with the world. Its potential to augment human capabilities, solve global challenges, and create new industries is why physical AI is dominating conversations today. But how do we secure these systems against cyber threats that could have real-world consequences?
- Company news & updates
Reija Stenroos, our Marketing Director, joined Xiphera in March 2025. This spring, she celebrated her first anniversary with the company. We sat down with Reija to hear her insights and reflections on her first year at Xiphera.