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Resource Sheet

CHACHA20-POLY1305

IP Core for ChaCha20-Poly1305 Authenticated Encryption

Product code: XIP2113H

This IP core from Xiphera is a Intellectual Property (IP) core designed for ChaCha20- Poly1305 Authenticated Encryption with Associated Data (AEAD) scheme protecting both confidentiality and authenticity at the same time. The current definitive standard for ChaCha20-Poly1305 is RFC 8439, “ChaCha20 and Poly1305 for IETF Protocols”. ChaCha20-Poly1305 is a combination of the ChaCha20 stream cipher and Poly1305 message authentication code, both algorithms designed by Daniel J. Bernstein, and it is used an AEAD scheme in multiple protocols, including TLS 1.3.

This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.

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Japan is a focus market for Xiphera’s cryptographic hardware security solutions, and we are pleased to welcome Yasuhiro Okumura as our new Country Manager for Japan. His appointment strengthens our local presence and supports our continued growth in the region.
Xiphera has been selected for a new project under the European Space Agency’s (ESA) ARTES programme. The project will focus on developing a high-speed security IP core for optical satellite communications, further strengthening Xiphera’s position as a provider of advanced hardware-based cybersecurity solutions for the space sector.
17 June 2026. Espoo, Finland. Xiphera, the hardware-based cryptographic solutions expert, has announced a collaboration with Agile Analog, the analog security IP specialist. The integration of Xiphera’s digital cryptographic cores and Agile Analog’s agileSecure anti-tamper sensor IP creates a unified defense solution for the next generation of semiconductor security. This is particularly important as the industry transitions to Post-Quantum Cryptography (PQC).