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Resource Sheet

Advanced Encryption Standard (256-bit key),
XTS Mode IP Core

Product codes: XIP1183B / XIP1183H

This IP Core from Xiphera is a Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) with 256-bit long key in XTS mode. XTS is a mode of operation for a block cipher that is used primarily for protecting the confidentiality of data at rest. Consequently, AES-XTS is widely used for encrypting the contents of hard drives and other storage devices.

This document details FPGA and ASIC resource requirements and performance for the default configuration, including instantiation parameters, supported features, and the selected bus interface.

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News
2025 was a year that strengthened Xiphera’s position in hardware-based cryptography and delivered clear, steady progress. Our direction remained clear: to build a scalable and internationally focused business around hardware cryptography, delivered as Intellectual Property (IP) cores and security protocol engines for ASICs and FPGAs, and designed without hidden software elements.
Quantum computers will eventually break today’s public key encryption, and attackers may already capture and store sensitive data to decrypt in the future. Critical information must be protected in advance, before quantum technology becomes widely available.
Xiphera Ltd and iWave Global have entered into a collaboration to combine Xiphera’s advanced cryptographic solutions with iWave’s extensive portfolio of Altera FPGA-based boards and solutions.