Hardware-based security for high-level protection.
Xiphera’s product portfolio consists of efficient Intellectual Property (IP) cores for standardised cryptographic primitives and security protocols. By integrating Xiphera’s IP cores into their embedded designs, our customers can achieve the specified system-level security goals.
The majority of current implementations of cryptographic algorithms are based on software running on a processor. This approach increases the attack surface by relying on the underlying operating system, third party software libraries, and the processor architecture.
In contrast, Xiphera’s security approach is to implement the cryptographic algorithms directly in digital hardware, either on Field Programmable Gate Arrays (FPGAs) or Application Specific Integrated Circuits (ASIC). This approach offers performance advantages combined with first grade security, as the control over the implementation details — down to indivual bits and clock cycles — minimises the attack surface.
Xiphera categorises its products into Crypto Cores and Crypto Solutions. The former are for individual cryptographic primitives, whereas the latter support complex security protocols and internally use a collection of cryptographic primitives.
Xiphera’s Crypto Cores consist of secure and efficient IP cores for specific cryptographic algorithms. Each Crypto Core implements an individual algorithm or a small set of similar algorithms; examples of the former are individual block ciphers, cryptographic hash functions, and a true random number generator. Examples of the latter are the AES block cipher in different modes of operations, key exchange and digital signatures based on the same set of elliptic curves, or message authentication code and key derivation function based on the same cryptographic hash algorithm.
Xiphera’s Crypto Core portfolio includes only standardised cryptographic algorithms that are considered secure by the cryptographic community. The portfolio does not contain any legacy or proprietary algorithms with known weaknesses. Xiphera’s Crypto Cores are fully constant time implementations and offer a high-level of protection against common side-channel attacks.
As there are different requirements for cryptographic IP cores, Xiphera's cores are offered in three variants with different optimisation goals. The last letter (B, C, or H) in the IP core code denotes the optimisation goal as follows:
B = Balanced, optimised for both performance and digital logic usage,
C = Compact, optimised for low digital logic usage,
H = High-Speed, optimised for high performance.
All Crypto Cores are shipped with a comprehensive test bench and detailed documentation.
Visit the product pages for more details of available Crypto Cores:
Xiphera’s Crypto Solutions are pre-packaged IP core solutions for entire cryptographic protocols. They incorporate several Crypto Cores for the individual cryptographic algorithms as required by the protocol, and typically also implement hardware-based key management and the associated control logic within a single IP core.
Xiphera’s Crypto Solutions achieve very high levels of security due to the inclusion of hardware-based key management and full isolation of all critical cryptographic computations from the rest of the system. They also offer security features that are hard to implement from individual Crypto Cores such as isolation of parts of an embedded system behind secure connections.
Consequently, Xiphera’s Crypto Solutions offer our customers an easy way to protect their critical embedded systems with high-security cryptographic solutions.
Visit the product pages for more details about Xiphera’s Crypto Solutions:
An overview of Xiphera's current IP core offering is presented in the Product Table below.
The example FPGA resource and performance figures vary from FPGA family to another; for details visit the individual product pages.
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