As satellites generate and transfer increasing amounts of data, communications infrastructure must evolve to support higher bandwidths without compromising security. The project addresses this challenge by combining high-speed data protection with the performance requirements of next-generation space systems.

The project builds on Xiphera’s experience in developing hardware-based cryptographic IP and security solutions for demanding applications in the space, defense, telecommunications, and industrial sectors.

“We are excited to work with ESA on this project and contribute our expertise in hardware-based cybersecurity to future space systems,” said Petri Jehkonen, Director of Strategic Programs at Xiphera. “Future satellite constellations will rely on high-speed optical links capable of transferring massive amounts of data. Security must be built into these systems without compromising performance. This project gives us an opportunity to develop technologies that help address exactly that challenge.”

“The ARTES programme strengthens European sovereignty in core technologies for our space infrastructures, including cybersecurity and high-speed hardware cryptography. We look forward to contributing Xiphera’s subject-matter expertise in these fields to the European space ecosystem,” said Tommi Lampila, Chief Revenue Officer at Xiphera.

The project supports the development of technologies needed for future satellite constellations, where both ultra-high data rates and strong cybersecurity are essential requirements.

Advancing European semiconductor self-sufficiency and secure technologies

The SecureSoC project focuses on the development of system-on-chip (SoC) solutions that will provide a foundation for secure, high-performance products across industry, defence, automation and other critical sectors. The project is based on a security-by-design approach, incorporating AI-assisted verification methods and building on the outcomes of the earlier SoC Hub initiative.

The new project is launched in response to a significant change in the operating environment. Under the EU Cyber Resilience Act (CRA), all network-connected products placed on the European market will be required to meet hardware-level cybersecurity requirements by 2027.

“Cybersecurity is becoming increasingly important in light of the current climate of global uncertainty and advances in quantum computing, which threaten the integrity of existing cryptographic algorithms.The SecureSoC project, coordinated by Tampere University, represents a natural continuation of the SoC Hub community’s efforts to strengthen expertise in secure chip technologies. Within this project, the University will undertake research that will, for example, support the advancement of our digital and analogue components towards commercial readiness.SecureSoC is also the first initiative under SoC Hub in which Tampere University engages in close collaboration with OpenTitan, an open-source silicon Root of Trust (RoT) project, as an official research partner,” says Pekka Jääskeläinen, Professor of Computer Sciences at Tampere University.

Industry partners contribute specialist expertise

The industry partners involved in SecureSoC bring strong specialist expertise to the project, spanning hardware-level cybersecurity, software development and system-level design. This university-industry collaboration enables a comprehensive approach in which security, performance and usability are integrated into a coherent whole from the earliest stages of the design process.

“A key strength of the SecureSoC project lies in the complementary expertise of the partners. VLSI Solution contributes specialist expertise in compact system-on-chip (SoC) design and RISC‑V-based processing, reinforced by the capabilities of the other consortium members in hardware-based cybersecurity, cryptography and system-level security. VLSI Solution aims to leverage the expertise generated through the project in the development of both next-generation secure, network-connected SoCs and customer-specific solutions,” says Teppo Karema, CEO of VLSI Solution.

“Security must be built into technology from the chip level upwards.SecureSoC provides Xiphera with an opportunity to integrate our hardware-based cybersecurity and cryptographic IP solutions into next-generation Finnish semiconductor architectures, while strengthening national expertise in the development of secure digital systems,” says Petri Jehkonen, Director of Strategic Programs at Xiphera.

The significance of safety extends from technical solutions to broader societal goals, including digital sovereignty and security of supply.

“In the future, secure system-on-chip solutions will be as important to digital sovereignty and security of supply as networks, software and communications systems.Through the SecureSoC project, Insta is contributing to the development of expertise and technologies that strengthen both Insta’s and Finland’s ability to develop domestically produced, high-assurance hardware-based systems, with security extending across the entire supply chain,” says Tatu Männistö, Senior Director of Technology at Insta Advance Oy.

In practical applications, safety also encompasses the manageability and reliability of systems throughout their entire life cycle.

“Wapice works with its customers to develop systems that are integrated into critical societal infrastructure. Increasing system connectivity, growing software complexity and the resulting maintenance demands require a seamless chain of trust extending from the chip level to application software. Within the SecureSoC project, Wapice is developing next-generation, quantum-secure cybersecurity solutions to protect edge devices and their software, ensuring end-to-end security throughout the system lifecycle”, says Sakari Junnila from Wapice.

“Secure SoC provides Nokia with a powerful co-innovation environment to advance next-generation system-on-chip design and talent. We are applying artificial intelligence to accelerate design and verification, while progressing virtual environments and digital twins to enable earlier software development and validation. This work strengthens our expertise and drives faster, more efficient SoC development,” said Derek Urbaniak, Head of RAN RD SoC at Nokia.

SecureSoC lays the foundation for long-term semiconductor development in Finland

The evaluation framework developed within the SecureSoC project will also serve as a foundation for Finland’s emerging semiconductor IP roadmap and marketplace. It will provide a platform for integrating, testing and validating reusable IP blocks, subsystems and future SoC derivatives.

SecureSoC is therefore not only an individual research project but also lays the groundwork for the sustained development of semiconductor technologies in Finland.

As artificial intelligence moves beyond the digital realm and into our physical world, it brings unprecedented opportunities and risks. These systems power everything from autonomous vehicles to smart infrastructure, and they’re no longer just processing data. They’re interacting with environments, making real-time decisions, and handling sensitive data.

From agriculture to surgery and transportation, physical AI and robotics are transforming industries. Robots assist in planting, harvesting, and crop health monitoring, while AI-driven systems revolutionize surgery and Unmanned Aerial Vehicles (UAVs) play a strategic role in logistics, environmental monitoring, public safety and mission-critical operations. As their role expands, so does the urgency to secure them effectively.

The Risks of Unsecured Physical AI and Robotics

AI and robotics are not immune to security risks. As these systems move from digital environments into the physical world, the attack surface expands dramatically, turning every component into a potential target. Without robust cryptographic security solutions, physical AI systems become vulnerable to unauthorized access and tampering.

Attacks on physical AI and robotics platforms fall into two categories: physical attacks and digital attacks. Physical attacks involve the act of physically manipulating hardware with the aim of either disrupting function or obtaining unauthorized access. Digital attacks mainly concern software-related attacks that aim to exploit the vulnerabilities within the physical AI system’s software components. Both may lead to serious consequences for data and safety in the physical world.

Xiphera’s hardware-based security protects critical functions at the hardware level, reducing exposure to these threats.

Physical Attacks

Robust cryptographic solutions and hardware-based security are crucial in mitigating physical attacks (Security Considerations in AI-Robotics: A Survey of Current Methods, Challenges, and Opportunities, 2023). These include physically damaging sensors, spoofing, jamming, and manipulation.

Spoofing involves manipulating sensor data, communication signals, or environmental inputs to deceive the AI system into perceiving false reality. One example is LiDAR spoofing, which entails injecting fake laser returns to make a robot “see” obstacles or paths that don’t exist. This can disrupt the robot’s navigation system.

Hardware-based cryptography can significantly reduce the risk of spoofing in robotic systems by ensuring the authenticity, integrity, and confidentiality of sensor data, communication, and control signals. In the LiDAR example, hardware-based solutions can prevent attackers from injecting fake sensor data by using cryptographic data verification.

Another physical attack method is jamming, which refers to overwhelming a physical AI system’s sensors or communication channels with noise, false signals, or excessive data. The goal is to deny service, degrade performance, or force the physical AI system into unsafe operating conditions. Examples of jamming attacks include disrupting military drones with RF noise to force them to land or return to base.

While hardware-based cryptography cannot directly affect physical vulnerabilities of physical AI systems, it can mitigate the impact of jamming and improve overall system resilience by verifying the integrity and origin of received data. By implementing hardware-based encryption (e.g. AES-GCM or AES-XTS) for secondary communication channels, the physical AI system can switch to a secure channel if the primary channel is compromised. Cryptographic keys remain secure for establishing trusted connections post-jamming.

Finally, let’s talk manipulation. Some studies have brought to light the vulnerability of Inertial Measurement Unit sensors (IMUs) employed in robotic systems. Targeted attacks aim to disrupt velocity measurement, which can cause physical AI systems to lose control, leading to accidents and malfunctions.

Hardware-based cryptography can detect tampering, ensure data integrity, and mitigate the impact of physical attacks. If an attacker manipulates IMU data (e.g. by injecting false signals or altering readings), the cryptographic signature will fail verification, and the system rejects tampered data. Hardware-based secure boot ensures that only authenticated firmware runs on both the IMU and the physical AI system’s control unit.

Other Attacks

Physical AI and robotics systems can also suffer from other common cybersecurity attacks, such as backdoor attacks, malware and ransomware.

A backdoor attack is a stealthy technique of bypassing normal authentication methods to gain unauthorized access to a system and remotely control it. Malware can target systems such as surgical robots, enabling the attacker to track the movements of the robot’s arm and trigger the attack payload during important tasks. Ransomware attacks in the context of industrial robots attempt to lock them to extort ransom from the manufacturer.

Hardware-based cryptography can mitigate these risks by preventing unauthorized or malicious firmware (containing backdoors, malware or ransomware) from executing and authorizing only authenticated, unaltered code runs.

The consequences of unsecured physical AI and robotics are severe. Compromised systems in autonomous vehicles, surgical robots, or industrial machinery can lead to accidents, injuries, or even fatalities. Sensitive data breaches expose users and organizations to harm, while critical infrastructure disruptions result in downtime, financial losses, or safety hazards.

These examples are just a glimpse of the risks posed by unsecured physical AI and robotics. They highlight the urgent truth: cryptographic security solutions are essential to safeguarding the integrity, reliability, and safety of AI-driven systems in our physical world.

More on Why Hardware-Based Security is a Game Changer

We’ve explored how hardware-based cryptography protects physical AI systems and touched some of its advantages along the way. Let’s bring these benefits together to see why it’s a true game changer.

Hardware-based cryptography addresses the challenge of keeping physical AI and robotics systems secure by embedding security directly into the physical components of a device. Hardware-based security is more resistant to tampering, reverse engineering, and malicious modifications, making it ideal for physical AI applications where unauthorized access could have catastrophic consequences.

Trust in physical AI and robotics systems needs to be founded on consistent reliability, which is something updatable software cannot provide. Security architectures like hardware root of trust and secure boot are not only designed as inherently trusted foundations, but they also make sure that after initiation, the integrity and authenticity of firmware and configuration of a device is verified, which counters logical attacks. Additionally, a secure update mechanism ensures that when logical vulnerabilities are identified, they can be mitigated.

Security isn’t just about protection; it’s also about performance. Physical AI and robotics often demand real-time decision-making, where even milliseconds of delay can make the difference between safety and disaster. Software-based cryptography often introduces latency, creating bottlenecks that compromise real-time responsiveness. Hardware-based cryptography offers optimised latency and ensures consistent, predictable execution of security operations. By offloading these tasks to dedicated hardware, systems can maintain the precision, speed and reliability required for life-critical applications.

Hardware security IP is optimized for specific cryptographic tasks, consuming significantly less power compared to software. This efficiency is critical for battery-powered robots, drones, and edge AI devices, where energy consumption directly affects operational lifespan.

Hardware-based cryptography doesn’t just secure physical AI and robotics. It enables them to operate at their full potential, delivering both trust, energy efficiency, and real-time performance.

Conclusion

In the age of physical AI and robotics, security is everything. Digital attacks and physical attacks like spoofing, jamming, and manipulation threaten not only the functionality of these systems but also the safety and security of environments and people they interact with.

Hardware-based cryptography provides a robust foundation for securing physical AI and robotics. By embedding security directly into hardware, we can authenticate sensor data, protect communication channels, and ensure the integrity of critical systems. Hardware-based solutions offer resilience against tampering, real-time performance for life-critical applications, and energy efficiency for battery powered devices.

Xiphera specialises in hardware-based security, addressing the unique challenges of physical AI and robotics with solutions that are as innovative as they are reliable. As these technologies continue to evolve, so must our commitment to safeguarding them. The future of AI and robotics isn’t just about what they can do; it’s about ensuring they can do it securely, efficiently, and without compromise.

By prioritizing hardware-based security today, we pave the way for a safer, more trustworthy integration of physical AI and robotics into our daily lives. This way we’re protecting not just the systems themselves, but the people and industries that depend on them.

Sources:

Neupane et al. (2023): “Security Considerations in AI-Robotics: A Survey of Current Methods, Challenges, and Opportunities”. IEEE Access (Peer-reviewed journal by the Institute of Electrical and Electronics Engineers).

Sara Brax

Marketing Coordinator, Xiphera

The findings highlight a clear concern. Around 50% of GEO satellite links still transmit unencrypted IP traffic. While encryption has long been standard for satellite TV, many IP-based communications lack sufficient link- and network-layer protection. As a result, sensitive data can be exposed.

Encryption gaps in satellite networks

The study further shows that network-layer encryption, such as IPSec, is rarely used in private satellite networks. Unlike the public internet, where TLS is standard, internal satellite communications often remain unprotected.

At the same time, this is not just a theoretical risk. According to Financial Times, Russian satellites have maneuvered close to European communication satellites and may have intercepted or monitored their data traffic, in some cases remaining nearby for weeks. The situation is particularly concerning because some older satellites still rely on unencrypted links, including control and command channels, increasing the risk of exposure.

What this means for organisations and how to secure satellite communications

Taken together, these findings highlight a clear reality: satellite communications are both vulnerable and actively targeted. Organisations relying on GEO satellites may be exposing sensitive data, from operational systems to internal communications, without realising it. The long-standing assumption that satellite links are inherently secure no longer holds.

This is where Xiphera can make a real difference. With hardware-based, quantum-resistant cryptographic solutions, Xiphera helps satellite operators secure their networks from the ground up.

Xiphera’s portfolio covers the full spectrum of satellite security from Secure Boot and TRNG to AES-256-GCM and post-quantum cryptography, enabling protection across both link and network layers.

Fully hardware-based designs reduce attack surface and ensure reliable operation in space. With Xiphera, satellite operators can protect sensitive data, prevent leaks, and strengthen their systems against current and future threats.

Conclusion

Satellite links can no longer be assumed secure. In a world where both technical vulnerabilities and geopolitical threats are increasing, security must be built in by design, from the ground up.
Learn more about how Xiphera secures satellite systems.

Read the full research here: Don’t Look Up: There Are Sensitive Internal Links in the Clear on GEO Satellites
Read Financial Times article here.

Reija Stenroos

Marketing Director, Xiphera

Kimmo Järvinen is a hardware cryptography engineer and researcher with nearly 20 years of experience in the field. He has authored more than 60 scientific publications on cryptography, cryptographic engineering, and secure embedded systems, and holds a PhD in electrical engineering from Helsinki University of Technology.

According to Järvinen, post-quantum cryptography will be an important part of the future, but it will not replace the rest of the cryptographic toolbox.

Why quantum computers threaten some cryptography

The main risk posed by quantum computing targets public-key cryptography. Algorithms such as RSA and elliptic curve cryptography rely on mathematical problems that are extremely difficult for classical computers to solve. However, if sufficiently powerful quantum computers become available, Shor’s algorithm could solve these problems significantly faster.

This means an attacker could derive private keys from public keys, breaking the security assumptions behind widely used cryptographic systems.

“This is why post-quantum cryptography is being developed,” Järvinen explains. “If large-scale quantum computers become available, the mathematical foundations of current public-key systems would no longer provide sufficient security.”

As a result, new algorithms such as ML-KEM and ML-DSA are being standardized to replace vulnerable public-key methods.

Not all cryptography is vulnerable to quantum attacks

Despite the attention given to post-quantum cryptography, quantum computing does not threaten all cryptographic algorithms. Secure systems also rely on symmetric encryption, hash functions, and random number generation, which remain essential even in the post-quantum era.

For example, symmetric encryption algorithms such as AES are not broken by known quantum algorithms. The theoretical advantage provided by Grover’s algorithm can be mitigated by increasing key sizes, for example, by using AES-256.

This means that much of the cryptographic infrastructure used today will continue to play a key role in secure systems.

Cryptography is a system, not a single algorithm

Modern security protocols combine multiple cryptographic components, each serving a specific purpose. A good example is HTTPS. When a browser connects to a server, the TLS handshake uses public-key cryptography to authenticate the server and establish a shared secret. Once the secure session has been established, the actual data exchange is protected using symmetric encryption, typically AES.

“In real systems, cryptography always works as a combination of algorithms,” Järvinen says. “Public-key cryptography is just one part of the overall security architecture.”

Why hybrid cryptography is emerging

Another reason the transition will take time is the relative novelty of post-quantum algorithms. Although they have been carefully studied and standardized, classical algorithms such as RSA and elliptic curve cryptography have been analyzed for decades. Because of this, many experts recommend to use hybrid approaches.

Hybrid cryptography combines traditional public-key algorithms with post-quantum algorithms. This ensures security even if weaknesses are discovered in newly introduced PQC methods.

Conclusion

Post-quantum cryptography will play an important role in preparing for a future where quantum computers may exist. One of the key concerns is the so-called “harvest now, decrypt later” threat, where encrypted data is collected today and stored in the hope that future quantum computers could eventually break the encryption.

But post-quantum cryptography will not replace the full set of cryptographic technologies used today. Instead, future systems will rely on layered security architectures, combining classical and post-quantum cryptography. “Quantum-safe algorithms are essential for the future,” Järvinen concludes. “But secure systems will always require more than just one type of cryptography.”

At Xiphera, we design hardware-based cryptographic IP cores that support both classical and post-quantum algorithms for FPGA and ASIC designs. If you are evaluating how to build quantum-safe systems or planning your cryptographic transition, our team is happy to discuss secure architecture options.

1. FIPS 203 (Draft): Module-Lattice-Based Key Encapsulation Mechanism Standard
2. FIPS 204 (Draft): Module-Lattice-Based Digital Signature Standard
3. FIPS 205 (Draft): Stateless Hash-Based Digital Signature Standard

FIPS 203 describes three algorithms ML-KEM-512, ML-KEM-768, and ML-KEM-1024 targeting three different security levels. They are based on the Kyber variants Kyber-512, Kyber-768, and Kyber-1024, respectively.

FIPS 204 similarly describes three algorithms ML-DSA-44, ML-DSA-65, and ML-DSA-87 based on Dilithium-2, Dilithium-3, and Dilithium-5.

FIPS 205 includes in total 12 algorithms for three different security levels, two options for the underlying hash standards (SHA-2 or SHAKE-256), and either relatively small signatures or fast signing.

The announced winners of Round 3 included also a fourth algorithm called FALCON, which is another digital signature algorithm. A draft for a standard based on FALCON was not released in this batch, but NIST says that it intends to develop a standard for FALCON later. 

The drafts of FIPS 203, 204, and 205 are now open for commenting until November 22, 2023. NIST then takes the received comments into account and proposes the standards for approval to the U.S. Secretary of Commerce. It is likely that the final standards will be available during 2024.

The algorithms to be standardised include a few changes compared to the submission versions of CRYSTALS-Kyber, CRYSTALS-Dilithium, and SPHINCS+. The changes are relatively small and include changes in the lengths of certain hash values, slightly modified Fujisaki-Okamoto transform for Kyber, removal of certain hash computations that were safeguarding against flawed random number generators, changes on the way how specific seed values are to be generated, small modifications of which hash functions are used inside the algorithms, etc.

Xiphera will soon release modified versions of the xQlave® family of post-quantum cryptography so that they comply with these changes. “We anticipate that the changes will not have major impacts on the resource requirements or performance of the products”, says Kimmo Järvinen, co-founder and CTO of Xiphera.

Read more about Xiphera’s xQlave® family of quantum-secure cryptography.

Although the first algorithms to be standardised are now chosen, the NIST PQC competition will still continue with the 4th round that includes four KEM algorithms: BIKE, Classic McEliece, HQC, and SIKE. There will be a completely new call for new signature algorithms later this year. Even the winner algorithms may still get slightly tweaked before the draft standards are out.

“NIST’s announcement is a big thing for the cryptography community and for us in Xiphera. We can now focus our R&D efforts to the algorithms that will end up in the final standard”, says Kimmo Järvinen, Xiphera’s CTO and co-founder.

Stay tuned for more updates on Xiphera’s forthcoming PQC portfolio later this year.